PART-A
Question 1.
How are data, address and control buses involved in data transfer to and from memory? Consider a computer system with 16 registers of 32 bit each and RAM of 1GB. Calculate the size of data bus and address bus required for the same.
Question 2.
A Bus organised CPU has 16 registers with 32 bits in each, a ALU and a destination Decoder.
Question 3.
Specify the control word in order to implement the following micro operations
(b) R4?R4
(c) R7?input
Question 4.
Determine the micro operation that will be executed in the processor when following 14 bit control words are applies
(b) 00000000000000
Question 5. Write a program to evaluate the arithmetic statement
A*[B+C*(D+E)]
F*(G+H)
(b) Using 2 address instructions
(c) Using 1 address instructions
(d) Using 0 address instructions
PART-B
Question 6.
An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains 200. Evaluate the effective address if the addressing mode is
(b) immediate
(c) relative
(d) register indirect
(e) index with R1 as index register
(f) register
Question 7.
Show the contents of E, A, Q and SC during the process of multiplication of two binary numbers, 11111 (multiplicand) and 10101(multiplier).
Question 8.
Perform the same multiplication using Booth Algorithm
Question 9.
Show the contents of E, A, Q and SC during the process of division of two binary numbers, 10100011 by 1011.
Question 10.
Show that adding B after A+B+1 restores the original value of A. What should be done with end carry?